Scalable Hardware Verification with Symbolic Simulation

• Main Author: Bertacco, Valeria (Author)
• Corporate Author: SpringerLink (Online service)
• Format: Electronic eBook
• Language: English
• Published: Boston, MA : Springer US, 2006.
• Subjects: Engineering.; Computer hardware.; Computer-aided engineering.; Electrical engineering.; Electronic circuits.; Circuits and Systems.; Computer-Aided Engineering (CAD, CAE) and Design.; Computer Hardware.; Electrical Engineering.

Scalable Hardware Verification with Symbolic Simulation presents recent advancements in symbolic simulation-based solutions which radically improve scalability. It overviews current verification techniques, both based on logic simulation and formal verification methods, and unveils the inner working...

Table of Contents:

• Design and Verification of Digital Systems
• Symbolic Simulation
• Compacting Intermediate States
• Approximate Simulation
• Exact Parametrizations
• Conclusion.