SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modeling /
SystemVerilog is a rich set of extensions to the Verilog Hardware Description Language (Verilog HDL). SystemVerilog for Design describes the correct usage of these extensions for modeling digital designs. These important extensions enable the representation of complex digital logic in concise, accur...
| Main Authors: | Sutherland, Stuart (Author), Davidmann, Simon (Author), Flake, Peter (Author) |
|---|---|
| Corporate Author: | SpringerLink (Online service) |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Boston, MA :
Springer US,
2006.
|
| Edition: | Second Edition. |
| Subjects: | |
| Online Access: | Full Text via HEAL-Link |
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