Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits 2nd Edition /

Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to significant challenges for IC testing. As the variation of fundamental parameters such as channel length, threshold voltage, thin oxide thickness and interconnect dimensions goes well beyond acceptabl...

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Bibliographic Details
Corporate Author: SpringerLink (Online service)
Other Authors: Sachdev, Manoj (Editor), Gyvez, José Pineda de (Editor)
Format: Electronic eBook
Language:English
Published: Boston, MA : Springer US, 2007.
Series:Frontiers in Electronic Testing, 34
Subjects:
Online Access:Full Text via HEAL-Link
Table of Contents:
  • Functional and Parametric Defect Models
  • Digital CMOS Fault Modeling
  • Defects in Logic Circuits and their Test Implications
  • Testing Defects and Parametric Variations in RAMs
  • Defect-Oriented Analog Testing
  • Yield Engineering
  • Conclusion.