SAT-Based Scalable Formal Verification Solutions

SAT-Based Scalable Formal Verification Solutions

Functional verification has become an important aspect of the chip design process. Significant resources, both in industry and academia, are devoted to the design complexity and verification endeavors. SAT-Based Scalable Formal Verification Solutions discusses in detail several of the latest and int...

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Bibliographic Details
Main Authors: Ganai, Malay K. (Author), Gupta, Aarti (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:English
Published: Boston, MA : Springer US, 2007.
Series:Series on Integrated Circuits and Systems,
Subjects:
Computer science.
Computer-aided engineering.
Electrical engineering.
Electronic circuits.
Computer Science.
Computer-Aided Engineering (CAD, CAE) and Design.
Circuits and Systems.
Electrical Engineering.
Online Access:Full Text via HEAL-Link

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Full Text via HEAL-Link

ΒΚΠ - Πατρα: ALFd

Holdings details from ΒΚΠ - Πατρα: ALFd
Call Number: 330.01 BAU
Copy 1 Available

ΒΚΠ - Πατρα: BSC

Holdings details from ΒΚΠ - Πατρα: BSC
Call Number: 330.01 BAU
Copy 2 Available
Copy 3 Available

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