Timing Optimization Through Clock Skew Scheduling
Timing Optimization Through Clock Skew Scheduling focuses on optimizing the timing of large scale, high performance, digital synchronous systems. A particular emphasis is placed on algorithms for non-zero clock skew scheduling to improve the performance and reliability of VLSI circuits. This researc...
Συγγραφή απο Οργανισμό/Αρχή: | |
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Άλλοι συγγραφείς: | , , |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2009.
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- VLSI Systems
- Signal Delay in VLSI Systems
- Timing Properties of Synchronous Systems
- Clock Skew Scheduling and Clock Tree Synthesis
- Clock Skew Scheduling of Level-Sensitive Circuits
- Clock Skew Scheduling for Improved Reliability
- Delay Insertion and Clock Skew Scheduling
- Practical Considerations
- Clock Skew Scheduling in Rotary Clocking Technology
- Experimental Results.