Standardized Functional Verification
Standardized Functional Verification describes the science of functional verification that applies to any digital hardware system. With a precise and comprehensive terminology this book describes a thorough technical framework for achieving superior results with greater efficiency. It also defines a...
Κύριος συγγραφέας: | Wiemann, Alan (Συγγραφέας) |
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Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2008.
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Παρόμοια τεκμήρια
-
Taxonomies for the Development and Verification of Digital Systems
Έκδοση: (2005) -
System Verilog for Verification A Guide to Learning the Testbench Language Features /
ανά: Spear, Chris
Έκδοση: (2008) -
Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits
ανά: CASTRO-LÓPEZ, R., κ.ά.
Έκδοση: (2006) -
The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™ /
ανά: Silva, Francisco da, κ.ά.
Έκδοση: (2006) -
Timing Optimization Through Clock Skew Scheduling
Έκδοση: (2009)