Low-Power High-Level Synthesis for Nanoscale CMOS Circuits

• Main Authors: Patra, Priyardarsan (Author), Kougianos, Elias (Author), Ranganathan, Nagarajan (Author), Mohanty, Saraju P. (Author)
• Corporate Author: SpringerLink (Online service)
• Format: Electronic eBook
• Language: English
• Published: Boston, MA : Springer US, 2008.
• Subjects: Engineering.; Computer hardware.; Computer-aided engineering.; Electrical engineering.; Electronics.; Microelectronics.; Electronic circuits.; Circuits and Systems.; Electronics and Microelectronics, Instrumentation.; Computer-Aided Engineering (CAD, CAE) and Design.; Computer Hardware.; Electrical Engineering.

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) r...

Table of Contents:

• High-Level Synthesis Fundamentals
• Power Modeling and Estimation at Transistor and Logic Gate Levels
• Architectural Power Modeling and Estimation
• Power Reduction Fundamentals
• Energy or Average Power Reduction
• Peak Power Reduction
• Transient Power Reduction
• Leakage Power Reduction
• Conclusions and Future Direction.