|
|
|
|
| LEADER |
02665nam a22005415i 4500 |
| 001 |
978-1-4020-4758-9 |
| 003 |
DE-He213 |
| 005 |
20151204161844.0 |
| 007 |
cr nn 008mamaa |
| 008 |
100301s2006 ne | s |||| 0|eng d |
| 020 |
|
|
|a 9781402047589
|9 978-1-4020-4758-9
|
| 024 |
7 |
|
|a 10.1007/978-1-4020-4758-9
|2 doi
|
| 040 |
|
|
|d GrThAP
|
| 050 |
|
4 |
|a TK7888.4
|
| 072 |
|
7 |
|a TJFC
|2 bicssc
|
| 072 |
|
7 |
|a TEC008010
|2 bisacsh
|
| 082 |
0 |
4 |
|a 621.3815
|2 23
|
| 100 |
1 |
|
|a DasGupta, Pallab.
|e author.
|
| 245 |
1 |
2 |
|a A Roadmap for Formal Property Verification
|h [electronic resource] /
|c by Pallab DasGupta.
|
| 264 |
|
1 |
|a Dordrecht :
|b Springer Netherlands,
|c 2006.
|
| 300 |
|
|
|a XIV, 252 p.
|b online resource.
|
| 336 |
|
|
|a text
|b txt
|2 rdacontent
|
| 337 |
|
|
|a computer
|b c
|2 rdamedia
|
| 338 |
|
|
|a online resource
|b cr
|2 rdacarrier
|
| 347 |
|
|
|a text file
|b PDF
|2 rda
|
| 505 |
0 |
|
|a Languages for Temporal Properties -- How Does the Property Checker Work? -- Is My Specification Consistent? -- Have I Written Enough Properties? -- Design Intent Coverage -- Test Generation Games -- A Roadmap for Formal Property Verification.
|
| 520 |
|
|
|a Integrating formal property verification (FPV) into an existing design process raises several interesting questions. Have I written enough properties? Have I written a consistent set of properties? What should I do when the FPV tool runs into capacity issues? This book develops the answers to these questions and fits them into a roadmap for formal property verification – a roadmap that shows how to glue FPV technology into the traditional validation flow. A Roadmap for Formal Property Verification explores the key issues in this powerful technology through simple examples – you do not need any background on formal methods to read most parts of this book.
|
| 650 |
|
0 |
|a Engineering.
|
| 650 |
|
0 |
|a Logic design.
|
| 650 |
|
0 |
|a Mathematical logic.
|
| 650 |
|
0 |
|a Computer-aided engineering.
|
| 650 |
|
0 |
|a Electrical engineering.
|
| 650 |
|
0 |
|a Electronics.
|
| 650 |
|
0 |
|a Microelectronics.
|
| 650 |
|
0 |
|a Electronic circuits.
|
| 650 |
1 |
4 |
|a Engineering.
|
| 650 |
2 |
4 |
|a Circuits and Systems.
|
| 650 |
2 |
4 |
|a Computer-Aided Engineering (CAD, CAE) and Design.
|
| 650 |
2 |
4 |
|a Electronics and Microelectronics, Instrumentation.
|
| 650 |
2 |
4 |
|a Logic Design.
|
| 650 |
2 |
4 |
|a Electrical Engineering.
|
| 650 |
2 |
4 |
|a Mathematical Logic and Formal Languages.
|
| 710 |
2 |
|
|a SpringerLink (Online service)
|
| 773 |
0 |
|
|t Springer eBooks
|
| 776 |
0 |
8 |
|i Printed edition:
|z 9781402047572
|
| 856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-1-4020-4758-9
|z Full Text via HEAL-Link
|
| 912 |
|
|
|a ZDB-2-ENG
|
| 950 |
|
|
|a Engineering (Springer-11647)
|
