CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications

While the throughput of microprocessor systems tends to increase as a result of ongoing technology scaling and the advent of multi-core systems, the off-chip I/O communication bandwidth emerges as one of the potential bottlenecks that limit overall performance. In order to alleviate the communicatio...

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Bibliographic Details
Main Authors: Muller, Paul (Author), Leblebici, Yusuf (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:English
Published: Dordrecht : Springer Netherlands : Imprint: Springer, 2007.
Series:Analog Circuits and Signal Processing,
Subjects:
Online Access:Full Text via HEAL-Link
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245 1 0 |a CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications  |h [electronic resource] /  |c by Paul Muller, Yusuf Leblebici. 
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300 |a XX, 191 p.  |b online resource. 
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490 1 |a Analog Circuits and Signal Processing,  |x 1872-082X 
505 0 |a Integrated Photonic Systems -- Basic Concepts -- System-Level Specifications -- Silicon Photodetectors -- Transimpedance Amplifier Design -- Limiting Amplifier Design -- Clock and Data Recovery Circuit. 
520 |a While the throughput of microprocessor systems tends to increase as a result of ongoing technology scaling and the advent of multi-core systems, the off-chip I/O communication bandwidth emerges as one of the potential bottlenecks that limit overall performance. In order to alleviate the communication speed constraints, optical data communication interfaces move ever closer to the processor core. It is widely expected that future generation digital systems will increasingly rely on chip-to-chip and board-to-board optical data communications for higher bandwidth and better noise immunity. This book focuses on optical communications for short and very short distance applications and discusses the monolithic integration of optical receivers with processing elements in standard CMOS technologies. CMOS Multi-Channel Single-Chip Receivers for Multi-Gigabit Optical Data Communications provides the reader with the necessary background knowledge to fully understand the trade-offs in short-distance communication receiver design and presents the key issues to be addressed in the development of such receivers in CMOS technologies. Moreover, novel design approaches are presented. A system-level design methodology allows for the impact analysis of different block specifications and system-wide design optimization. Statistical models are used for design space exploration in the scope of jitter tolerance analysis of clock recovery circuits. CMOS Multi-Channel Single-Chip Receivers for Multi-Gigabit Optical Data Communications is required reading for practicing engineers and researchers in the field of short-distance optical communications and optical CMOS receiver design. 
650 0 |a Engineering. 
650 0 |a Electrical engineering. 
650 0 |a Microwaves. 
650 0 |a Optical engineering. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 0 |a Electronic circuits. 
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650 2 4 |a Electrical Engineering. 
650 2 4 |a Circuits and Systems. 
650 2 4 |a Microwaves, RF and Optical Engineering. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
650 2 4 |a Communications Engineering, Networks. 
700 1 |a Leblebici, Yusuf.  |e author. 
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950 |a Engineering (Springer-11647)