Full-Chip Nanometer Routing Techniques
As Moore's Law continues unencumbered into the nanometer era, chips are reaching 1000 M gates in size, process geometries have shrunk to 90 nm and below, and engineers have to face compounded design complexity with every new design. These nanometer-scale designs require a new generation of phys...
Main Authors: | , , |
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Corporate Author: | |
Format: | Electronic eBook |
Language: | English |
Published: |
Dordrecht :
Springer Netherlands,
2007.
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Series: | Analog Circuits And Signal Processing Series
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Subjects: | |
Online Access: | Full Text via HEAL-Link |
Internet
Full Text via HEAL-LinkΒΚΠ - Πατρα: ALFd
Call Number: |
330.01 BAU |
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Copy 1 | Available |
ΒΚΠ - Πατρα: BSC
Call Number: |
330.01 BAU |
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Copy 2 | Available |
Copy 3 | Available |