Interconnect-Centric Design for Advanced SoC and NoC
In Interconnect-centric Design for Advanced SoC and NoC, we have tried to create a comprehensive understanding about on-chip interconnect characteristics, design methodologies, layered views on different abstraction levels and finally about applying the interconnect-centric design in system-on-chip...
Συγγραφή απο Οργανισμό/Αρχή: | |
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Άλλοι συγγραφείς: | , , , |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2005.
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- Physical and Electrical Issues
- System-on-Chip-Challenges in the Deep-Sub-Micron Era
- Wires as Interconnects
- Global Interconnect Analysis
- Design Methodologies for on-Chip Inductive Interconnect
- Clock Distribution for High Performance Designs
- Logical and Architectural Issues
- Error-Tolerant Interconnect Schemes
- Power Reduction Coding for Buses
- Bus Structures in Network-on-Chips
- From Buses to Networks
- Arbitration and Routing Schemes for on-Chip Packet Networks
- Design Methodology and Tools
- Self-Timed Approach for Noise Reduction in NoC Reduction in NoC
- Formal Communication Modeling and Refinement
- Network-Centric System-Level Model for Multiprocessor Soc Simulation
- Socket-Based Design Using Decoupled Interconnects
- Application Cases
- Interconnect and Memory Organization in SOCs for Advanced Set-Top Boxes and TV
- A Brunch from the Coffee Table-Case Study in NoC Platform Design.