Generating Hardware Assertion Checkers For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring /

• Κύριοι συγγραφείς: Boulé, Marc (Συγγραφέας), Zilic, Zeljko (Συγγραφέας)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Dordrecht : Springer Netherlands, 2008.
• Θέματα: Engineering.; Programming languages (Electronic computers).; Computers.; Electronic circuits.; Circuits and Systems.; Theory of Computation.; Programming Languages, Compilers, Interpreters.

Assertion-based design is a powerful new paradigm that is facilitating quality improvement in electronic design. Assertions are statements used to describe properties of the design (I.e., design intent), that can be included to actively check correctness throughout the design cycle and even the life...

Πίνακας περιεχομένων:

• Assertions and the Verification Landscape
• Basic Techniques Behind Assertion Checkers
• PSL and SVA Assertion Languages
• Automata for Assertion Checkers
• Construction of PSL Assertion Checkers
• Enhanced Features and Uses of PSL Checkers
• Evaluating and Verifying PSL Assertion Checkers
• Checkers for SystemVerilog Assertions
• Conclusions and Future Work.