Designing Reliable and Efficient Networks on Chips
Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge. With technology scaling, as the geometries of on-chip devices reach the physical limits of operation, another impor...
| Κύριος συγγραφέας: | Murali, Srinivasan (Συγγραφέας) |
|---|---|
| Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
| Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
| Γλώσσα: | English |
| Έκδοση: |
Dordrecht :
Springer Netherlands,
2009.
|
| Σειρά: | Lecture Notes in Electrical Engineering,
34 |
| Θέματα: | |
| Διαθέσιμο Online: | Full Text via HEAL-Link |
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