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02955nam a22004335i 4500 |
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978-1-4419-6460-1 |
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DE-He213 |
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20151125193508.0 |
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cr nn 008mamaa |
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101125s2011 xxu| s |||| 0|eng d |
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|a 9781441964601
|9 978-1-4419-6460-1
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|a 10.1007/978-1-4419-6460-1
|2 doi
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|d GrThAP
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|a TK7888.4
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|a TJFC
|2 bicssc
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|a TEC008010
|2 bisacsh
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|a 621.3815
|2 23
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|a Multiprocessor System-on-Chip
|h [electronic resource] :
|b Hardware Design and Tool Integration /
|c edited by Michael Hübner, Jürgen Becker.
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264 |
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|a New York, NY :
|b Springer New York,
|c 2011.
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300 |
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|a VIII, 270 p.
|b online resource.
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336 |
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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|a text file
|b PDF
|2 rda
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|a Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. •Provides a state-of-the-art overview of system design using MPSoC architectures; •Describes current trends in on-chip communication architectures; •Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; •Includes coverage of challenges in physical design for multi- and manycore hardware architectures.
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650 |
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|a Engineering.
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650 |
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|a Computer-aided engineering.
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650 |
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|a Electronic circuits.
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650 |
1 |
4 |
|a Engineering.
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650 |
2 |
4 |
|a Circuits and Systems.
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650 |
2 |
4 |
|a Computer-Aided Engineering (CAD, CAE) and Design.
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700 |
1 |
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|a Hübner, Michael.
|e editor.
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700 |
1 |
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|a Becker, Jürgen.
|e editor.
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710 |
2 |
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|a SpringerLink (Online service)
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773 |
0 |
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|t Springer eBooks
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776 |
0 |
8 |
|i Printed edition:
|z 9781441964595
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856 |
4 |
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|u http://dx.doi.org/10.1007/978-1-4419-6460-1
|z Full Text via HEAL-Link
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912 |
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|a ZDB-2-ENG
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950 |
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|a Engineering (Springer-11647)
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