Scalable Multi-core Architectures Design Methodologies and Tools /
As Moore’s law continues to unfold, two important trends have recently emerged. First, the growth of chip capacity is translated into a corresponding increase of number of cores. Second, the parallalization of the computation and 3D integration technologies lead to distributed memory architectures....
| Corporate Author: | |
|---|---|
| Other Authors: | , |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
New York, NY :
Springer New York,
2012.
|
| Edition: | 1. |
| Subjects: | |
| Online Access: | Full Text via HEAL-Link |
Table of Contents:
- Part I: HS/SW/ Building Blocks: Architecture, Methods, and Techniques
- 1. Memory Architecture and Management in an NoC Platform
- 2. Application-Specific Multi-Threaded Dynamic Memory Management
- 3. Power Management Architecture in McNoC
- 4. ASIP Exploration and Design
- Part II: System-level Exploration
- 5. System Exploration
- 6. MPA: Parallelization Made Easy
- Part III: Industrial Applications
- 7. MPSoC Architecture Performance Analysis for Agile SDR Radio Applications
- 8. Application of the MOSART Flow on the WiMAX (802.16e) PHY.