Low-Power Variation-Tolerant Design in Nanometer Silicon
Low-Power Variation-Tolerant Design in Nanometer Silicon Edited by: Swarup Bhunia Saibal Mukhopadhyay Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-thresh...
Συγγραφή απο Οργανισμό/Αρχή: | |
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Άλλοι συγγραφείς: | , |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2011.
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Έκδοση: | 1. |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- Introduction and Motivation
- Background on Power Dissipation
- Background on Parameter Variations
- Low power Logic Design under Variations
- Low Power Memory Design under Variations
- System and Architecture Level Design
- Emerging Challenges and Solution Approach
- Conclusion and Discussion.