Error Control for Network-on-Chip Links
As technology scales into nanoscale regime, it is impossible to guarantee the perfect hardware design. Moreover, if the requirement of 100% correctness in hardware can be relaxed, the cost of manufacturing, verification, and testing will be significantly reduced. Many approaches have been proposed t...
Κύριοι συγγραφείς: | Fu, Bo (Συγγραφέας), Ampadu, Paul (Συγγραφέας) |
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Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
New York, NY :
Springer New York,
2012.
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Έκδοση: | 1. |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Παρόμοια τεκμήρια
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Low Power Networks-on-Chip
Έκδοση: (2011) -
Reliability, Availability and Serviceability of Networks-on-Chip
ανά: Cota, Érika, κ.ά.
Έκδοση: (2012) -
Processor and System-on-Chip Simulation
Έκδοση: (2010) -
Programming Many-Core Chips
ανά: Vajda, András
Έκδοση: (2011) -
On-Chip Interconnect with aelite Composable and Predictable Systems /
ανά: Hansson, Andreas, κ.ά.
Έκδοση: (2011)