Emerging Memory Technologies Design, Architecture, and Applications /

This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basi...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Άλλοι συγγραφείς: Xie, Yuan (Επιμελητής έκδοσης)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: New York, NY : Springer New York : Imprint: Springer, 2014.
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
LEADER 03439nam a22004695i 4500
001 978-1-4419-9551-3
003 DE-He213
005 20151204184325.0
007 cr nn 008mamaa
008 131021s2014 xxu| s |||| 0|eng d
020 |a 9781441995513  |9 978-1-4419-9551-3 
024 7 |a 10.1007/978-1-4419-9551-3  |2 doi 
040 |d GrThAP 
050 4 |a TK7888.4 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
082 0 4 |a 621.3815  |2 23 
245 1 0 |a Emerging Memory Technologies  |h [electronic resource] :  |b Design, Architecture, and Applications /  |c edited by Yuan Xie. 
264 1 |a New York, NY :  |b Springer New York :  |b Imprint: Springer,  |c 2014. 
300 |a VI, 322 p. 219 illus., 137 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Non-Volatile Memory -- A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement -- Energy-Efficient Systems Using Resistive Memory Devices -- Asymmetric in STT-RAM Cell Operations -- An Energy-efficient 3D Stacked STTRAM Cache Architecture for CMPs -- STT-RAM Cache Hierarchy Design and Exploration with Emerging Magnetic Devices -- Resistive Memories in Associative Computing -- Weal Leveling Techniques for Non-Volatile Memories -- A Circuit-Architecture Co-optimization Framework for Exploring Non-volatile Memory Hierarchies -- Ferroelectric Nonvolatile Processor Design, Optimization and Application. 
520 |a This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basis for future universal memories. This book provides a holistic perspective on the topic, covering modeling, design, architecture and applications. The practical information included in this book will enable designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future, mainstream integrated circuits. • Provides a comprehensive reference on designing modern circuits with emerging, non-volatile memory technologies, such as MRAM and PCRAM; • Explores new design opportunities offered by emerging memory technologies, from a holistic perspective; • Describes topics in technology, modeling, architecture and applications; • Enables circuit designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future computing systems. . 
650 0 |a Engineering. 
650 0 |a Microprocessors. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 0 |a Electronic circuits. 
650 1 4 |a Engineering. 
650 2 4 |a Circuits and Systems. 
650 2 4 |a Processor Architectures. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
700 1 |a Xie, Yuan.  |e editor. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9781441995506 
856 4 0 |u http://dx.doi.org/10.1007/978-1-4419-9551-3  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)