Variation Tolerant On-Chip Interconnects
This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm t...
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Format: | Electronic eBook |
Language: | English |
Published: |
New York, NY :
Springer New York,
2012.
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Series: | Analog Circuits and Signal Processing
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Online Access: | Full Text via HEAL-Link |
Table of Contents:
- Introduction
- On-Chip Communication
- Interconnect Design Techniques
- Design of Delay-Insensitive Current Sensing Interconnects
- Enhancing Completion Detection Performance
- Energy Efficient Semi-Serial Interconnect
- Comparison of the Designed Interconnects
- Circuit Techniques for PVT Variation Tolerance.