System-Level Validation High-Level Modeling and Directed Test Generation Techniques /

This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures.  Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, i...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριοι συγγραφείς: Chen, Mingsong (Συγγραφέας), Qin, Xiaoke (Συγγραφέας), Koo, Heon-Mo (Συγγραφέας), Mishra, Prabhat (Συγγραφέας)
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: New York, NY : Springer New York : Imprint: Springer, 2013.
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
LEADER 02920nam a22005055i 4500
001 978-1-4614-1359-2
003 DE-He213
005 20151125152016.0
007 cr nn 008mamaa
008 120925s2013 xxu| s |||| 0|eng d
020 |a 9781461413592  |9 978-1-4614-1359-2 
024 7 |a 10.1007/978-1-4614-1359-2  |2 doi 
040 |d GrThAP 
050 4 |a TK7888.4 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
082 0 4 |a 621.3815  |2 23 
100 1 |a Chen, Mingsong.  |e author. 
245 1 0 |a System-Level Validation  |h [electronic resource] :  |b High-Level Modeling and Directed Test Generation Techniques /  |c by Mingsong Chen, Xiaoke Qin, Heon-Mo Koo, Prabhat Mishra. 
264 1 |a New York, NY :  |b Springer New York :  |b Imprint: Springer,  |c 2013. 
300 |a XXII, 250 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Introduction -- Modeling and Specification of SoC Designs -- Automated Generation of Directed Tests -- Functional Test Compaction.- Property Clustering and Learning Techniques -- Decision Ordering Based Learning Techniques -- Synchronized Generation of Directed Tests -- Learning-Oriented Property Decomposition Approaches -- Directed Test Generation for Multicore Architectures -- Test Generation for Cache Coherence Validation.- Reuse of System-Level Tests for Implementation Validation -- Conclusion. 
520 |a This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures.  Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, including high-level modeling of designs and faults, automated generation of directed tests, and efficient validation methodology using directed tests and assertions.  The methodologies described in this book will help designers to improve the quality of their validation, performing as much validation as possible in the early stages of the design, while reducing the overall validation effort and cost. 
650 0 |a Engineering. 
650 0 |a Microprocessors. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 0 |a Electronic circuits. 
650 1 4 |a Engineering. 
650 2 4 |a Circuits and Systems. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
650 2 4 |a Processor Architectures. 
700 1 |a Qin, Xiaoke.  |e author. 
700 1 |a Koo, Heon-Mo.  |e author. 
700 1 |a Mishra, Prabhat.  |e author. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9781461413585 
856 4 0 |u http://dx.doi.org/10.1007/978-1-4614-1359-2  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)