Designing 2D and 3D Network-on-Chip Architectures
This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms,...
| Κύριοι συγγραφείς: | Tatas, Konstantinos (Συγγραφέας), Siozios, Kostas (Συγγραφέας), Soudris, Dimitrios (Συγγραφέας), Jantsch, Axel (Συγγραφέας) |
|---|---|
| Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
| Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
| Γλώσσα: | English |
| Έκδοση: |
New York, NY :
Springer New York : Imprint: Springer,
2014.
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| Θέματα: | |
| Διαθέσιμο Online: | Full Text via HEAL-Link |
Παρόμοια τεκμήρια
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Routing Algorithms in Networks-on-Chip
Έκδοση: (2014) -
Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling /
ανά: Mandal, Ayan, κ.ά.
Έκδοση: (2014) -
Microarchitecture of Network-on-Chip Routers A Designer's Perspective /
ανά: Dimitrakopoulos, Giorgos, κ.ά.
Έκδοση: (2015) -
Power Distribution Networks with On-Chip Decoupling Capacitors
ανά: Jakushokas, Renatas, κ.ά.
Έκδοση: (2011) -
Analysis and Design of Networks-on-Chip Under High Process Variation
ανά: Ezz-Eldin, Rabab, κ.ά.
Έκδοση: (2015)