Designing 2D and 3D Network-on-Chip Architectures

• Main Authors: Tatas, Konstantinos (Author), Siozios, Kostas (Author), Soudris, Dimitrios (Author), Jantsch, Axel (Author)
• Corporate Author: SpringerLink (Online service)
• Format: Electronic eBook
• Language: English
• Published: New York, NY : Springer New York : Imprint: Springer, 2014.
• Subjects: Engineering.; Microprocessors.; Electronics.; Microelectronics.; Electronic circuits.; Circuits and Systems.; Electronics and Microelectronics, Instrumentation.; Processor Architectures.

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect.  It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools.  Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms,...

Table of Contents:

• Part I: Network-on-Chip Design Methodology
• Network-on-Chip Technology: A Paradigm Shift
• NoC Modeling and Topology Exploration
• Communication Architecture
• Power and Thermal Effects and Management
• NoC-based System Integration
• NoC Verification and Testing
• The Spidergon STNoC
• Middleware Memory Management in NoC
• On Designing 3-D Platforms
• The SYSMANTIC NoC Design and Prototyping Framework
• Part II: Suggested Projects.-  Projects on Network-on Chip.