High Performance Multi-Channel High-Speed I/O Circuits
This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at highe...
Κύριοι συγγραφείς: | , |
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Συγγραφή απο Οργανισμό/Αρχή: | |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
New York, NY :
Springer New York : Imprint: Springer,
2014.
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Σειρά: | Analog Circuits and Signal Processing,
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- Introduction
- 2x6 Gb/s MIMO Crosstalk Cancellation and Signal Reutilization Scheme in 130 nm CMOS Process
- 4x12 Gb/s MIMO Crosstalk Cancellation and Signal Reutilization Receiver in 65 nm CMOS Process
- Adaptive XTCR, AGC, and Adaptive DFE Loop
- Research Summary & Contributions
- References
- Appendix A: Noise Analysis
- Appendix B: Issues of Applying Consecutive 2x2 XTCR on Multi-Lane I/Os (≥ 4)
- Appendix C: Transmitter-Side Discrete-Time FIR XTC Filter versus Receiver-Side Analog-IIR XTC Filter
- Appendix D: Line Mismatch Sensitivity
- Appendix E: Input Matching for 4x4 XTCR Receiver Test Bench
- Appendix F: Bandwidth Improvement by Technology Scaling.