|
|
|
|
LEADER |
03230nam a22004455i 4500 |
001 |
978-1-4614-8030-3 |
003 |
DE-He213 |
005 |
20151218091531.0 |
007 |
cr nn 008mamaa |
008 |
130812s2014 xxu| s |||| 0|eng d |
020 |
|
|
|a 9781461480303
|9 978-1-4614-8030-3
|
024 |
7 |
|
|a 10.1007/978-1-4614-8030-3
|2 doi
|
040 |
|
|
|d GrThAP
|
050 |
|
4 |
|a TK7888.4
|
072 |
|
7 |
|a TJFC
|2 bicssc
|
072 |
|
7 |
|a TEC008010
|2 bisacsh
|
082 |
0 |
4 |
|a 621.3815
|2 23
|
100 |
1 |
|
|a Kienle, Frank.
|e author.
|
245 |
1 |
0 |
|a Architectures for Baseband Signal Processing
|h [electronic resource] /
|c by Frank Kienle.
|
264 |
|
1 |
|a New York, NY :
|b Springer New York :
|b Imprint: Springer,
|c 2014.
|
300 |
|
|
|a XVIII, 260 p.
|b online resource.
|
336 |
|
|
|a text
|b txt
|2 rdacontent
|
337 |
|
|
|a computer
|b c
|2 rdamedia
|
338 |
|
|
|a online resource
|b cr
|2 rdacarrier
|
347 |
|
|
|a text file
|b PDF
|2 rda
|
505 |
0 |
|
|a Introduction -- Digital Transmission System -- Channel Coding Basics -- Hardware Design of Individual Components -- Turbo Codes -- Low-Density Parity Check Codes -- Bit-Interleaved Coded MIMO System -- Comparing Architectures.
|
520 |
|
|
|a This book addresses readers in electrical engineering, computer engineering, and computer science with an interest in the field of communications engineering, architectures, and microelectronic design. The focus is on implementation aspects and implementation constraints of individual components that are needed in transceivers for current standards, such as UMTS, LTE, WiMAX and DVB-S2. The application domain is the so called outer receiver, which comprises the channel coding, interleaving stages, modulator, and multiple antenna transmission. Throughout the book, the focus is on advanced algorithms that are actually in use in modern communications systems. Their basic principles are always derived with a focus on the resulting communications and implementation performance. As a result, this book serves as a valuable reference for two, typically disparate audiences in communication systems and hardware design. It addresses challenges faced by both the algorithm designer and the chip designer, who need to deal with the ongoing increase of algorithmic complexity and required data throughput for today’s mobile applications. • Enables algorithm designers and chip designers to meet challenges posed by the ongoing increase of algorithmic complexity and required data throughput for today’s mobile applications; • Describes techniques for improved utilization of the bandwidth, as well as maximizing area and power profile to reduce fabrication costs; • Focuses on advanced algorithms that are actually in use in modern communications systems.
|
650 |
|
0 |
|a Engineering.
|
650 |
|
0 |
|a Microprocessors.
|
650 |
|
0 |
|a Electronic circuits.
|
650 |
1 |
4 |
|a Engineering.
|
650 |
2 |
4 |
|a Circuits and Systems.
|
650 |
2 |
4 |
|a Processor Architectures.
|
650 |
2 |
4 |
|a Signal, Image and Speech Processing.
|
710 |
2 |
|
|a SpringerLink (Online service)
|
773 |
0 |
|
|t Springer eBooks
|
776 |
0 |
8 |
|i Printed edition:
|z 9781461480297
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-1-4614-8030-3
|z Full Text via HEAL-Link
|
912 |
|
|
|a ZDB-2-ENG
|
950 |
|
|
|a Engineering (Springer-11647)
|