Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling /
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how...
Κύριοι συγγραφείς: | Mandal, Ayan (Συγγραφέας), Khatri, Sunil P. (Συγγραφέας), Mahapatra, Rabi (Συγγραφέας) |
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Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
New York, NY :
Springer New York : Imprint: Springer,
2014.
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Παρόμοια τεκμήρια
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Routing Algorithms in Networks-on-Chip
Έκδοση: (2014) -
Microarchitecture of Network-on-Chip Routers A Designer's Perspective /
ανά: Dimitrakopoulos, Giorgos, κ.ά.
Έκδοση: (2015) -
Power Distribution Networks with On-Chip Decoupling Capacitors
ανά: Jakushokas, Renatas, κ.ά.
Έκδοση: (2011) -
Designing 2D and 3D Network-on-Chip Architectures
ανά: Tatas, Konstantinos, κ.ά.
Έκδοση: (2014) -
Analysis and Design of Networks-on-Chip Under High Process Variation
ανά: Ezz-Eldin, Rabab, κ.ά.
Έκδοση: (2015)