Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling /

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks.  The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how...

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Bibliographic Details
Main Authors: Mandal, Ayan (Author), Khatri, Sunil P. (Author), Mahapatra, Rabi (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:English
Published: New York, NY : Springer New York : Imprint: Springer, 2014.
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ΒΚΠ - Πατρα: ALFd

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Call Number: 330.01 BAU
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ΒΚΠ - Πατρα: BSC

Holdings details from ΒΚΠ - Πατρα: BSC
Call Number: 330.01 BAU
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