System-level Test and Validation of Hardware/Software Systems
New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers. As well as giving rise to new design practices,...
Συγγραφή απο Οργανισμό/Αρχή: | |
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Άλλοι συγγραφείς: | , , |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
London :
Springer London,
2005.
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Σειρά: | Springer Series in Advanced Microelectronics,
17 |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- Modeling Permanent Faults
- Test Generation: A Symbolic Approach
- Test Generation: A Heuristic Approach
- Test Generation: A Hierarchical Approach
- Test Program Generation from High-level Microprocessor Descriptions
- Tackling Concurrency and Timing Problems
- An Approach to System-level Design for Test
- System-level Dependability Analysis.