Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge res...
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Format: | Electronic eBook |
Language: | English |
Published: |
Cham :
Springer International Publishing : Imprint: Springer,
2014.
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Online Access: | Full Text via HEAL-Link |
Internet
Full Text via HEAL-LinkΒΚΠ - Πατρα: ALFd
Call Number: |
330.01 BAU |
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Copy 1 | Available |
ΒΚΠ - Πατρα: BSC
Call Number: |
330.01 BAU |
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Copy 2 | Available |
Copy 3 | Available |