High-Bandwidth Memory Interface

This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριοι συγγραφείς: Kim, Chulwoo (Συγγραφέας), Lee, Hyun-Woo (Συγγραφέας), Song, Junyoung (Συγγραφέας)
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Cham : Springer International Publishing : Imprint: Springer, 2014.
Σειρά:SpringerBriefs in Electrical and Computer Engineering,
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
LEADER 02661nam a22005055i 4500
001 978-3-319-02381-6
003 DE-He213
005 20151103124049.0
007 cr nn 008mamaa
008 131027s2014 gw | s |||| 0|eng d
020 |a 9783319023816  |9 978-3-319-02381-6 
024 7 |a 10.1007/978-3-319-02381-6  |2 doi 
040 |d GrThAP 
050 4 |a TK7888.4 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
082 0 4 |a 621.3815  |2 23 
100 1 |a Kim, Chulwoo.  |e author. 
245 1 0 |a High-Bandwidth Memory Interface  |h [electronic resource] /  |c by Chulwoo Kim, Hyun-Woo Lee, Junyoung Song. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2014. 
300 |a VIII, 88 p. 91 illus., 41 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
490 1 |a SpringerBriefs in Electrical and Computer Engineering,  |x 2191-8112 
505 0 |a An introduction to high-speed DRAM -- An I/O Line Configuration and Organization of DRAM -- Clock generation and distribution -- Transceiver Design -- TSV Interface for DRAM. 
520 |a This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.   • Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design; • Presents state-of-the-art techniques for memory interface design; • Covers memory interface design at both the circuit level and system architecture level. 
650 0 |a Engineering. 
650 0 |a Electronic circuits. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 1 4 |a Engineering. 
650 2 4 |a Circuits and Systems. 
650 2 4 |a Electronic Circuits and Devices. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
700 1 |a Lee, Hyun-Woo.  |e author. 
700 1 |a Song, Junyoung.  |e author. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9783319023809 
830 0 |a SpringerBriefs in Electrical and Computer Engineering,  |x 2191-8112 
856 4 0 |u http://dx.doi.org/10.1007/978-3-319-02381-6  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)