Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors

This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive disc...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριοι συγγραφείς: Azambuja, José Rodrigo (Συγγραφέας), Kastensmidt, Fernanda (Συγγραφέας), Becker, Jürgen (Συγγραφέας)
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Cham : Springer International Publishing : Imprint: Springer, 2014.
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
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020 |a 9783319063409  |9 978-3-319-06340-9 
024 7 |a 10.1007/978-3-319-06340-9  |2 doi 
040 |d GrThAP 
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072 7 |a TEC008010  |2 bisacsh 
082 0 4 |a 621.3815  |2 23 
100 1 |a Azambuja, José Rodrigo.  |e author. 
245 1 0 |a Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors  |h [electronic resource] /  |c by José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2014. 
300 |a XVIII, 94 p. 37 illus., 11 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Introduction -- Background -- Fault Tolerance Techniques for Processors -- Proposed Techniques to Detect Transient Faults in Processors -- Simulation Fault Injection Experimental Results -- Configuration Bitstream Fault Injection Experimental Results -- Radiation Experimental Results -- Conclusions and Future Work. 
520 |a This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques. The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time. • Discusses the effects of radiation on modern integrated circuits; • Provides a comprehensive overview of state-of-the art fault tolerance techniques based on software, hardware, and hybrid techniques; • Introduces novel hybrid fault tolerance techniques for reconfigurable FPGAs and ASICs; • Performs fault injection campaigns by simulation, bitstream fault injection, and radiation experiments; • Enables readers to use techniques with lower performance degradation, area occupation, and memory usage. 
650 0 |a Engineering. 
650 0 |a Electronic circuits. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 1 4 |a Engineering. 
650 2 4 |a Circuits and Systems. 
650 2 4 |a Electronic Circuits and Devices. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
700 1 |a Kastensmidt, Fernanda.  |e author. 
700 1 |a Becker, Jürgen.  |e author. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9783319063393 
856 4 0 |u http://dx.doi.org/10.1007/978-3-319-06340-9  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)