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03366nam a22004575i 4500 |
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978-3-319-06838-1 |
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DE-He213 |
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20151204163748.0 |
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141008s2015 gw | s |||| 0|eng d |
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|a 9783319068381
|9 978-3-319-06838-1
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|a 10.1007/978-3-319-06838-1
|2 doi
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|d GrThAP
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|a TK7888.4
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|a TJFC
|2 bicssc
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|a TEC008010
|2 bisacsh
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|a 621.3815
|2 23
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|a Gong, Lingkan.
|e author.
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|a Functional Verification of Dynamically Reconfigurable FPGA-based Systems
|h [electronic resource] /
|c by Lingkan Gong, Oliver Diessel.
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|a Cham :
|b Springer International Publishing :
|b Imprint: Springer,
|c 2015.
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300 |
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|a XXI, 216 p. 72 illus., 48 illus. in color.
|b online resource.
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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|a text file
|b PDF
|2 rda
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|a Introduction -- Verification Challenges -- Modeling Reconfiguration -- Getting Started with Verification -- Case Studies -- References Designs -- Conclusions.- Appendix A: Bugs Detected in Case Studies -- Appendix B: Inside the ReSim Library -- References.
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|a This book analyzes the challenges in verifying Dynamically Reconfigurable Systems (DRS) with respect to the user design and the physical implementation of such systems. The authors describe the use of a simulation-only layer to emulate the behavior of target FPGAs and accurately model the characteristic features of reconfiguration. Readers are enabled with this simulation-only layer to maintain verification productivity by abstracting away the physical details of the FPGA fabric. Two implementations of the simulation-only layer are included: Extended ReChannel is a SystemC library that can be used to check DRS designs at a high level; ReSim is a library to support RTL simulation of a DRS reconfiguring both its logic and state. Through a number of case studies, the authors demonstrate how their approach integrates seamlessly with existing, mainstream DRS design flows and with well-established verification methodologies such as top-down modeling and coverage-driven verification. Provides researchers with an in-depth understanding of the challenges in verifying dynamically reconfigurable systems and the state-of-the-art methods used to overcome them; Guides engineers with systematic approaches and tools to achieve verification closure in their dynamically reconfigurable projects; Includes a comprehensive set of case studies, with an analysis of real bugs detected in the designs described; Uses tools and techniques compatible with mainstream products (e.g. Xilinx/Altera tools, ModelSim simulator, Verilog/VHDL design language, etc. …).
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|a Engineering.
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650 |
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|a Microprocessors.
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|a Electronic circuits.
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|a Engineering.
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|a Circuits and Systems.
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650 |
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|a Processor Architectures.
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|a Electronic Circuits and Devices.
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|a Diessel, Oliver.
|e author.
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|a SpringerLink (Online service)
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|t Springer eBooks
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|i Printed edition:
|z 9783319068374
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|u http://dx.doi.org/10.1007/978-3-319-06838-1
|z Full Text via HEAL-Link
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|a ZDB-2-ENG
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950 |
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|a Engineering (Springer-11647)
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