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03227nam a22004575i 4500 |
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978-3-319-09309-3 |
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DE-He213 |
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20151204170743.0 |
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140925s2015 gw | s |||| 0|eng d |
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|a 9783319093093
|9 978-3-319-09309-3
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|a 10.1007/978-3-319-09309-3
|2 doi
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|d GrThAP
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|a TK7888.4
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|a TJFC
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|a TEC008010
|2 bisacsh
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|a 621.3815
|2 23
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|a Dehbashi, Mehdi.
|e author.
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|a Debug Automation from Pre-Silicon to Post-Silicon
|h [electronic resource] /
|c by Mehdi Dehbashi, Görschwin Fey.
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|a Cham :
|b Springer International Publishing :
|b Imprint: Springer,
|c 2015.
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|a XIV, 171 p. 93 illus., 55 illus. in color.
|b online resource.
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
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|a text file
|b PDF
|2 rda
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|a Introduction -- Preliminaries -- Part I Debug of Design Bugs -- Automated Debugging for Logic Bugs -- Automated Debugging from Pre-Silicon to Post-Silicon -- Automated Debugging for Synchronization Bugs -- Part II Debug of Delay Faults -- Analyzing Timing Variations -- Automated Debugging for Timing Variations -- Efficient Automated Speedpath Debugging -- Part III Debug of Transactions -- Online Debug for NoC-Based Multiprocessor SoCs -- Summary and Outlook.
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|a This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers. Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages; Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level; Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
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650 |
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|a Engineering.
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650 |
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|a Microprocessors.
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650 |
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|a Electronic circuits.
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|a Engineering.
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650 |
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|a Circuits and Systems.
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650 |
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|a Processor Architectures.
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650 |
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|a Electronic Circuits and Devices.
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|a Fey, Görschwin.
|e author.
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|a SpringerLink (Online service)
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|t Springer eBooks
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776 |
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|i Printed edition:
|z 9783319093086
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856 |
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|u http://dx.doi.org/10.1007/978-3-319-09309-3
|z Full Text via HEAL-Link
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912 |
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|a ZDB-2-ENG
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950 |
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|a Engineering (Springer-11647)
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