APA (7th ed.) Citation

Lourenço, N., Martins, R., & Horta, N. (2017). Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects. Springer International Publishing : Imprint: Springer.

Chicago Style (17th ed.) Citation

Lourenço, Nuno, Ricardo Martins, and Nuno Horta. Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects. Cham: Springer International Publishing : Imprint: Springer, 2017.

MLA (8th ed.) Citation

Lourenço, Nuno, et al. Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects. Springer International Publishing : Imprint: Springer, 2017.