|
|
|
|
LEADER |
02826nam a22004575i 4500 |
001 |
978-3-319-43174-1 |
003 |
DE-He213 |
005 |
20160802140310.0 |
007 |
cr nn 008mamaa |
008 |
160802s2017 gw | s |||| 0|eng d |
020 |
|
|
|a 9783319431741
|9 978-3-319-43174-1
|
024 |
7 |
|
|a 10.1007/978-3-319-43174-1
|2 doi
|
040 |
|
|
|d GrThAP
|
050 |
|
4 |
|a TK7888.4
|
072 |
|
7 |
|a TJFC
|2 bicssc
|
072 |
|
7 |
|a TEC008010
|2 bisacsh
|
082 |
0 |
4 |
|a 621.3815
|2 23
|
100 |
1 |
|
|a Amaru, Luca Gaetano.
|e author.
|
245 |
1 |
0 |
|a New Data Structures and Algorithms for Logic Synthesis and Verification
|h [electronic resource] /
|c by Luca Gaetano Amaru.
|
264 |
|
1 |
|a Cham :
|b Springer International Publishing :
|b Imprint: Springer,
|c 2017.
|
300 |
|
|
|a XVI, 156 p. 44 illus., 20 illus. in color.
|b online resource.
|
336 |
|
|
|a text
|b txt
|2 rdacontent
|
337 |
|
|
|a computer
|b c
|2 rdamedia
|
338 |
|
|
|a online resource
|b cr
|2 rdacarrier
|
347 |
|
|
|a text file
|b PDF
|2 rda
|
505 |
0 |
|
|a Introduction -- Part 1. Logic Representation, Manipulation and Optimization -- Biconditional Logic -- Majority Logic -- Part 2. Logic Satisfiability and Equivalence Checking -- Exploiting Logic Properties to Speedup SAT -- Majority Normal Form Representation and Satisfiability -- Improvements to the Equivalence Checking of Reversible Circuits -- Conclusions.
|
520 |
|
|
|a This book introduces new logic primitives for electronic design automation tools. The author approaches fundamental EDA problems from a different, unconventional perspective, in order to demonstrate the key role of rethinking EDA solutions in overcoming technological limitations of present and future technologies. The author discusses techniques that improve the efficiency of logic representation, manipulation and optimization tasks by taking advantage of majority and biconditional logic primitives. Readers will be enabled to accelerate formal methods by studying core properties of logic circuits and developing new frameworks for logic reasoning engines. · Provides a comprehensive, theoretical study on majority and biconditional logic for logic synthesis; · Updates the current scenario in synthesis and verification – especially in light of emerging technologies; · Demonstrates applications to CMOS technology and emerging technologies.
|
650 |
|
0 |
|a Engineering.
|
650 |
|
0 |
|a Logic design.
|
650 |
|
0 |
|a Microprocessors.
|
650 |
|
0 |
|a Electronic circuits.
|
650 |
1 |
4 |
|a Engineering.
|
650 |
2 |
4 |
|a Circuits and Systems.
|
650 |
2 |
4 |
|a Processor Architectures.
|
650 |
2 |
4 |
|a Logic Design.
|
710 |
2 |
|
|a SpringerLink (Online service)
|
773 |
0 |
|
|t Springer eBooks
|
776 |
0 |
8 |
|i Printed edition:
|z 9783319431734
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-3-319-43174-1
|z Full Text via HEAL-Link
|
912 |
|
|
|a ZDB-2-ENG
|
950 |
|
|
|a Engineering (Springer-11647)
|