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03718nam a22005415i 4500 |
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978-3-319-49025-0 |
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20170102141403.0 |
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170102s2017 gw | s |||| 0|eng d |
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|a 9783319490250
|9 978-3-319-49025-0
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|a 10.1007/978-3-319-49025-0
|2 doi
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|d GrThAP
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|a TK7888.4
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|a TJFC
|2 bicssc
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|a TEC008010
|2 bisacsh
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|a 621.3815
|2 23
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|a Hardware IP Security and Trust
|h [electronic resource] /
|c edited by Prabhat Mishra, Swarup Bhunia, Mark Tehranipoor.
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|a Cham :
|b Springer International Publishing :
|b Imprint: Springer,
|c 2017.
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300 |
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|a XII, 353 p. 131 illus., 78 illus. in color.
|b online resource.
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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|a text file
|b PDF
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|a Part I. Introduction -- Chapter 1.Security and Trust Vulnerabilities in Third-party IPs -- PArt II.Trust Analysis -- Chapter 2.Security Rule Check -- Chapter 3.Digital Circuit Vulnerabilities to Hardware Trojans -- Chapter 4.Code Coverage Analysis for IP Trust Verification -- Chapter 5.Analyzing Circuit Layout to Probing Attack -- Chapter 6.Testing of Side Channel Leakage of Cryptographic IPs: Metrics and Evaluations -- Part III -- Effective Countermeasures -- Chapter 7.Hardware Hardening Approaches using Camouflaging, Encryption and Obfuscation -- Chapter 8.A Novel Mutating Runtime Architecture for Embedding Multiple Countermeasures Against Passive Side Channel Attacks -- Part IV -- Chapter 9.Validation of IP Security and Trust -- Chapter 10.IP Trust Validation using Proof-carrying Hardware -- Chapter 11. Hardware Trust Verification -- Chapter 12.Verification of Unspecified IP Functionality -- Chapter 13.Verifying Security Properties in Modern SoCs using Instruction-level Abstractions -- Chapter 14. Test Generation for Detection of Malicious Parametric Variations -- Part V. Conclusions -- Chapter 15.The Future of Trustworthy SoC Design.
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|a This book provides an overview of current Intellectual Property (IP) based System-on-Chip (SoC) design methodology and highlights how security of IP can be compromised at various stages in the overall SoC design-fabrication-deployment cycle. Readers will gain a comprehensive understanding of the security vulnerabilities of different types of IPs. This book would enable readers to overcome these vulnerabilities through an efficient combination of proactive countermeasures and design-for-security solutions, as well as a wide variety of IP security and trust assessment and validation techniques. This book serves as a single-source of reference for system designers and practitioners for designing secure, reliable and trustworthy SoCs.
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650 |
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0 |
|a Engineering.
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650 |
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|a Microprocessors.
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650 |
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0 |
|a Computer security.
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650 |
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0 |
|a Data encryption (Computer science).
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650 |
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|a Electronics.
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650 |
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0 |
|a Microelectronics.
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650 |
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|a Electronic circuits.
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650 |
1 |
4 |
|a Engineering.
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650 |
2 |
4 |
|a Circuits and Systems.
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650 |
2 |
4 |
|a Data Encryption.
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650 |
2 |
4 |
|a Systems and Data Security.
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650 |
2 |
4 |
|a Electronics and Microelectronics, Instrumentation.
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650 |
2 |
4 |
|a Processor Architectures.
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700 |
1 |
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|a Mishra, Prabhat.
|e editor.
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700 |
1 |
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|a Bhunia, Swarup.
|e editor.
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700 |
1 |
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|a Tehranipoor, Mark.
|e editor.
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710 |
2 |
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|a SpringerLink (Online service)
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773 |
0 |
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|t Springer eBooks
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776 |
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8 |
|i Printed edition:
|z 9783319490243
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856 |
4 |
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|u http://dx.doi.org/10.1007/978-3-319-49025-0
|z Full Text via HEAL-Link
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912 |
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|a ZDB-2-ENG
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950 |
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|a Engineering (Springer-11647)
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