|
|
|
|
LEADER |
03258nam a22004695i 4500 |
001 |
978-3-319-50057-7 |
003 |
DE-He213 |
005 |
20180106141603.0 |
007 |
cr nn 008mamaa |
008 |
170124s2017 gw | s |||| 0|eng d |
020 |
|
|
|a 9783319500577
|9 978-3-319-50057-7
|
024 |
7 |
|
|a 10.1007/978-3-319-50057-7
|2 doi
|
040 |
|
|
|d GrThAP
|
050 |
|
4 |
|a TK7888.4
|
072 |
|
7 |
|a TJFC
|2 bicssc
|
072 |
|
7 |
|a TEC008010
|2 bisacsh
|
082 |
0 |
4 |
|a 621.3815
|2 23
|
245 |
1 |
0 |
|a Fundamentals of IP and SoC Security
|h [electronic resource] :
|b Design, Verification, and Debug /
|c edited by Swarup Bhunia, Sandip Ray, Susmita Sur-Kolay.
|
264 |
|
1 |
|a Cham :
|b Springer International Publishing :
|b Imprint: Springer,
|c 2017.
|
300 |
|
|
|a VI, 316 p. 105 illus., 52 illus. in color.
|b online resource.
|
336 |
|
|
|a text
|b txt
|2 rdacontent
|
337 |
|
|
|a computer
|b c
|2 rdamedia
|
338 |
|
|
|a online resource
|b cr
|2 rdacarrier
|
347 |
|
|
|a text file
|b PDF
|2 rda
|
505 |
0 |
|
|a Introduction -- Security Validation -- SoC Security and Debug -- IP Trust: The Problem and Design/Validation based Solution -- Security of Crypto IP Core: Issues and Countermeasures -- PUF-Based Authentication -- FPGA-based IP and SoC Security -- Physical Unclonable Functions and Intellectual Property Protection Techniques -- A Systematic Approach to Fault-Attack Resistant Design -- Hardware Trojan Attacks and Countermeasures -- In-place Logic Obfuscation for Emerging Nonvolatile FPGAs -- Security Standards for Embedded Devices and Systems -- Conclusion.
|
520 |
|
|
|a This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the “trenches” of current industrial practice in design, implementation, and validation of security-critical embedded systems. Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs; Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs; Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security. .
|
650 |
|
0 |
|a Engineering.
|
650 |
|
0 |
|a Microprocessors.
|
650 |
|
0 |
|a Electronic circuits.
|
650 |
1 |
4 |
|a Engineering.
|
650 |
2 |
4 |
|a Circuits and Systems.
|
650 |
2 |
4 |
|a Processor Architectures.
|
650 |
2 |
4 |
|a Electronic Circuits and Devices.
|
700 |
1 |
|
|a Bhunia, Swarup.
|e editor.
|
700 |
1 |
|
|a Ray, Sandip.
|e editor.
|
700 |
1 |
|
|a Sur-Kolay, Susmita.
|e editor.
|
710 |
2 |
|
|a SpringerLink (Online service)
|
773 |
0 |
|
|t Springer eBooks
|
776 |
0 |
8 |
|i Printed edition:
|z 9783319500553
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-3-319-50057-7
|z Full Text via HEAL-Link
|
912 |
|
|
|a ZDB-2-ENG
|
950 |
|
|
|a Engineering (Springer-11647)
|