Foundations of Hardware IP Protection

This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Άλλοι συγγραφείς: Bossuet, Lilian (Επιμελητής έκδοσης), Torres, Lionel (Επιμελητής έκδοσης)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Cham : Springer International Publishing : Imprint: Springer, 2017.
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
LEADER 03293nam a22004815i 4500
001 978-3-319-50380-6
003 DE-He213
005 20170110154508.0
007 cr nn 008mamaa
008 170110s2017 gw | s |||| 0|eng d
020 |a 9783319503806  |9 978-3-319-50380-6 
024 7 |a 10.1007/978-3-319-50380-6  |2 doi 
040 |d GrThAP 
050 4 |a TK7888.4 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
082 0 4 |a 621.3815  |2 23 
245 1 0 |a Foundations of Hardware IP Protection  |h [electronic resource] /  |c edited by Lilian Bossuet, Lionel Torres. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2017. 
300 |a VII, 240 p. 125 illus., 48 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Digital Right Management for IP Protection -- Turning Electronic Circuits Features into On-Chip Locks -- Logic Modification-Based IP Protection Methods: An Overview and a Proposal -- IP FSM Watermarking -- Side Channel Analysis, an Efficient Ally for IP Protection -- Hardware Obfuscation -- An application of Partial Hardware Reverse Engineering for the Detection of Hardware Trojan -- Linear Complementary Codes: Novel Hardware Trojan Prevention and Detection Approach -- Ultra-Lightweight Implementation in Area of Block Ciphers -- Enhancing Secure Elements – Technology and Architecture. 
520 |a This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection. · Provides readers with a comprehensive overview of hardware intellectual property (IP) security, describing threat models and presenting means of protection, from integrated circuit layout to digital rights management of IP; · Enables readers to transpose techniques fundamental to digital rights management (DRM) to the realm of hardware IP security; · Introduce designers to the concept of salutary hardware, difficult to circumvent embedded hardware security systems. 
650 0 |a Engineering. 
650 0 |a Microprocessors. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 0 |a Electronic circuits. 
650 1 4 |a Engineering. 
650 2 4 |a Circuits and Systems. 
650 2 4 |a Processor Architectures. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
700 1 |a Bossuet, Lilian.  |e editor. 
700 1 |a Torres, Lionel.  |e editor. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9783319503783 
856 4 0 |u http://dx.doi.org/10.1007/978-3-319-50380-6  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)