Neuro-inspired Computing Using Resistive Synaptic Devices

This book summarizes the recent breakthroughs in hardware implementation of neuro-inspired computing using resistive synaptic devices. The authors describe how two-terminal solid-state resistive memories can emulate synaptic weights in a neural network. Readers will benefit from state-of-the-art sum...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Άλλοι συγγραφείς: Yu, Shimeng (Επιμελητής έκδοσης)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Cham : Springer International Publishing : Imprint: Springer, 2017.
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
LEADER 04059nam a22004455i 4500
001 978-3-319-54313-0
003 DE-He213
005 20170421180210.0
007 cr nn 008mamaa
008 170421s2017 gw | s |||| 0|eng d
020 |a 9783319543130  |9 978-3-319-54313-0 
024 7 |a 10.1007/978-3-319-54313-0  |2 doi 
040 |d GrThAP 
050 4 |a TK7888.4 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
082 0 4 |a 621.3815  |2 23 
245 1 0 |a Neuro-inspired Computing Using Resistive Synaptic Devices  |h [electronic resource] /  |c edited by Shimeng Yu. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2017. 
300 |a XI, 269 p. 190 illus., 79 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Chapter1: Introduction to Neuro-Inspired Computing using Resistive Synaptic Devices -- Part I: Device-level Demonstrations of Resistive Synaptic Devices -- Chapter2: Phase Change Memory based Synaptic Devices -- Chapter3: Pr0.7Ca0.3MnO3 (PCMO) based Synaptic Devices -- Chapter4: TaOx/TiO2 based Synaptic Devices -- Part II: Array-level Demonstrations of Resistive Synaptic Devices and Neural Networks -- Chapter5: Training and Inference in Hopfield Network using 10×10 Phase Change Synaptic Array -- Chapter6: Experimental Demonstration of Firing-Rate Neural Networks based on Metal-Oxide Memristive Crossbars -- Chapter7: Weight Tuning of Resistive Synaptic Devices and Convolution Kernel Operation on 12×12 Cross-Point Array -- Chapter8: Spiking Neural Network with 256×256 PCM Array -- Part III: Circuit, Architecture and Algorithm-level Design of Resistive Synaptic Devices based Neuromorphic System -- Chapter9: Peripheral Circuit Design Considerations of Neuro-inspired Architectures -- Chapter10: Processing-in-Memory Architecture Design for Accelerating Neuro-Inspired Algorithms -- Chapter11: Multi-layer Perceptron Algorithm: Impact of Non-Ideal Conductance and Area-Efficient Peripheral Circuits -- Chapter12: Impact of Non-Ideal Resistive Synaptic Device Behaviors on Implementation of Sparse Coding Algorithm -- Chapter13: Binary OxRAM/CBRAM Memories for Efficient Implementations of Embedded Neuromorphic Circuits. 
520 |a This book summarizes the recent breakthroughs in hardware implementation of neuro-inspired computing using resistive synaptic devices. The authors describe how two-terminal solid-state resistive memories can emulate synaptic weights in a neural network. Readers will benefit from state-of-the-art summaries of resistive synaptic devices, from the individual cell characteristics to the large-scale array integration. This book also discusses peripheral neuron circuits design challenges and design strategies. Finally, the authors describe the impact of device non-ideal properties (e.g. noise, variation, yield) and their impact on the learning performance at the system-level, using a device-algorithm co-design methodology. • Provides single-source reference to recent breakthroughs in resistive synaptic devices, not only at individual cell-level, but also at integrated array-level; • Includes detailed discussion of the peripheral circuits and array architecture design of the neuro-crossbar system; • Focuses on new experimental results that are likely to solve practical, artificial intelligent problems, such as image classification. 
650 0 |a Engineering. 
650 0 |a Microprocessors. 
650 0 |a Electronic circuits. 
650 1 4 |a Engineering. 
650 2 4 |a Circuits and Systems. 
650 2 4 |a Electronic Circuits and Devices. 
650 2 4 |a Processor Architectures. 
700 1 |a Yu, Shimeng.  |e editor. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9783319543123 
856 4 0 |u http://dx.doi.org/10.1007/978-3-319-54313-0  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)