Automated Validation & Verification of UML/OCL Models Using Satisfiability Solvers

This book provides a comprehensive discussion of UML/OCL methods and design flow, for automatic validation and verification of hardware and software systems. While the presented flow focuses on using satisfiability solvers, the authors also describe how these methods can be used for any other automa...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριοι συγγραφείς: Przigoda, Nils (Συγγραφέας, http://id.loc.gov/vocabulary/relators/aut), Wille, Robert (http://id.loc.gov/vocabulary/relators/aut), Przigoda, Judith (http://id.loc.gov/vocabulary/relators/aut), Drechsler, Rolf (http://id.loc.gov/vocabulary/relators/aut)
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Cham : Springer International Publishing : Imprint: Springer, 2018.
Έκδοση:1st ed. 2018.
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
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100 1 |a Przigoda, Nils.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Automated Validation & Verification of UML/OCL Models Using Satisfiability Solvers  |h [electronic resource] /  |c by Nils Przigoda, Robert Wille, Judith Przigoda, Rolf Drechsler. 
250 |a 1st ed. 2018. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2018. 
300 |a XII, 255 p. 16 illus., 5 illus. in color.  |b online resource. 
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520 |a This book provides a comprehensive discussion of UML/OCL methods and design flow, for automatic validation and verification of hardware and software systems. While the presented flow focuses on using satisfiability solvers, the authors also describe how these methods can be used for any other automatic reasoning engine.  Additionally, the design flow described is applied to a broad variety of validation and verification tasks.  The authors also cover briefly how non-functional properties such as timing constraints can be handled with the described flow. Provides a general flow and description for the validation and verification of UML/OCL models; Demonstrates a detailed realization of the general flow using satisfiability solvers; Includes a case study that presents the possibilities of the state-of-the-art approaches. 
650 0 |a Electronic circuits. 
650 0 |a Microprocessors. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 1 4 |a Circuits and Systems.  |0 http://scigraph.springernature.com/things/product-market-codes/T24068 
650 2 4 |a Processor Architectures.  |0 http://scigraph.springernature.com/things/product-market-codes/I13014 
650 2 4 |a Electronics and Microelectronics, Instrumentation.  |0 http://scigraph.springernature.com/things/product-market-codes/T24027 
700 1 |a Wille, Robert.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Przigoda, Judith.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Drechsler, Rolf.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
710 2 |a SpringerLink (Online service) 
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776 0 8 |i Printed edition:  |z 9783319728131 
776 0 8 |i Printed edition:  |z 9783319728155 
776 0 8 |i Printed edition:  |z 9783319892146 
856 4 0 |u https://doi.org/10.1007/978-3-319-72814-8  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)