Parasitic Substrate Coupling in High Voltage Integrated Circuits Minority and Majority Carriers Propagation in Semiconductor Substrate /

This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools. The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριοι συγγραφείς: Buccella, Pietro (Συγγραφέας, http://id.loc.gov/vocabulary/relators/aut), Stefanucci, Camillo (http://id.loc.gov/vocabulary/relators/aut), Kayal, Maher (http://id.loc.gov/vocabulary/relators/aut), Sallese, Jean-Michel (http://id.loc.gov/vocabulary/relators/aut)
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Cham : Springer International Publishing : Imprint: Springer, 2018.
Έκδοση:1st ed. 2018.
Σειρά:Analog Circuits and Signal Processing,
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
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100 1 |a Buccella, Pietro.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Parasitic Substrate Coupling in High Voltage Integrated Circuits  |h [electronic resource] :  |b Minority and Majority Carriers Propagation in Semiconductor Substrate /  |c by Pietro Buccella, Camillo Stefanucci, Maher Kayal, Jean-Michel Sallese. 
250 |a 1st ed. 2018. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2018. 
300 |a XVII, 183 p. 124 illus., 73 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
490 1 |a Analog Circuits and Signal Processing,  |x 1872-082X 
505 0 |a Chapter1: Overview of Parasitic Substrate Coupling -- Chapter2: Design Challenges in High Voltage ICs -- Chapter3: Substrate Modeling with Parasitic Transistors -- Chapter4: TCAD Validation of the Model -- Chapter5: Extraction Tool for the Substrate Network -- Chapter6: Parasitic Bipolar Transistors in Benchmark Structures -- Chapter7: Substrate Coupling Analysis and Evaluation of Protection Strategies. 
520 |a This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools. The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits. The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis. Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits; Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate; Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices; Offers design guidelines to reduce couplings by adding specific test protections. 
650 0 |a Electronic circuits. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 1 4 |a Circuits and Systems.  |0 http://scigraph.springernature.com/things/product-market-codes/T24068 
650 2 4 |a Electronic Circuits and Devices.  |0 http://scigraph.springernature.com/things/product-market-codes/P31010 
650 2 4 |a Electronics and Microelectronics, Instrumentation.  |0 http://scigraph.springernature.com/things/product-market-codes/T24027 
700 1 |a Stefanucci, Camillo.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Kayal, Maher.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Sallese, Jean-Michel.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
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776 0 8 |i Printed edition:  |z 9783319743813 
776 0 8 |i Printed edition:  |z 9783319743837 
776 0 8 |i Printed edition:  |z 9783030089764 
830 0 |a Analog Circuits and Signal Processing,  |x 1872-082X 
856 4 0 |u https://doi.org/10.1007/978-3-319-74382-0  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)