System Level Design from HW/SW to Memory for Embedded Systems 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6, 2015, Proceedings /

• Corporate Author: SpringerLink (Online service)
• Other Authors: Götz, Marcelo (Editor, http://id.loc.gov/vocabulary/relators/edt), Schirner, Gunar (Editor, http://id.loc.gov/vocabulary/relators/edt), Wehrmeister, Marco Aurélio (Editor, http://id.loc.gov/vocabulary/relators/edt), Al Faruque, Mohammad Abdullah (Editor, http://id.loc.gov/vocabulary/relators/edt), Rettberg, Achim (Editor, http://id.loc.gov/vocabulary/relators/edt)
• Format: Electronic eBook
• Language: English
• Published: Cham : Springer International Publishing : Imprint: Springer, 2017.
• Edition: 1st ed. 2017.
• Series: IFIP Advances in Information and Communication Technology, 523
• Subjects: Special purpose computers.; Computer hardware.; Architecture, Computer.; Software engineering.; Special Purpose and Application-Based Systems.; Computer Hardware.; Computer System Implementation.; Software Engineering/Programming and Operating Systems.
• Physical Description: XII, 231 p. 92 illus. online resource.
• ISBN: 9783319900230
• ISSN: 1868-4238 ;
• DOI: 10.1007/978-3-319-90023-0

This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015. The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.