Formal Verification of Floating-Point Hardware Design A Mathematical Approach /
This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design advances a verification methodology based on a unified theory of register-transfer logic and floating-poin...
| Main Author: | Russinoff, David M. (Author, http://id.loc.gov/vocabulary/relators/aut) |
|---|---|
| Corporate Author: | SpringerLink (Online service) |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Cham :
Springer International Publishing : Imprint: Springer,
2019.
|
| Edition: | 1st ed. 2019. |
| Subjects: | |
| Online Access: | Full Text via HEAL-Link |
Similar Items
-
Low-Power Design and Power-Aware Verification
by: Khondkar, Progyna, et al.
Published: (2018) -
High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip
by: Wang, Zheng, et al.
Published: (2018) -
Test Generation of Crosstalk Delay Faults in VLSI Circuits
by: Jayanthy, S., et al.
Published: (2019) -
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings /
Published: (2003) -
The Hardware Trojan War Attacks, Myths, and Defenses /
Published: (2018)