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121227s2004 gw | s |||| 0|eng d |
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|a 9783540277767
|9 978-3-540-27776-7
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|a 10.1007/b98714
|2 doi
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|a QA75.5-76.95
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|a COM031000
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|a 004.0151
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|a Computer Systems: Architectures, Modeling, and Simulation
|h [electronic resource] :
|b Third and Fourth International Workshops, SAMOS 2004, Samos, Greece, July 21-23, 2004 and July 19-21, 2004. Proceedings /
|c edited by Andy D. Pimentel, Stamatis Vassiliadis.
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|a Berlin, Heidelberg :
|b Springer Berlin Heidelberg,
|c 2004.
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|a XIV, 566 p.
|b online resource.
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|a text
|b txt
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|a computer
|b c
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|a online resource
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|a text file
|b PDF
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
|v 3133
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|a SAMOS III – Reconfigurable Computing -- The Molen Programming Paradigm -- Loading ??-Code: Design Considerations -- RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems -- Basic OS Support for Distributed Reconfigurable Hardware -- A Cost-Efficient RISC Processor Platform for Real Time Audio Applications -- Customising Processors: Design-Time and Run-Time Opportunities -- Intermediate Level Components for Reconfigurable Platforms -- Performance Estimation of Streaming Media Applications for Reconfigurable Platforms -- SAMOS III – Architectures and Implementation -- CoDeL: Automatically Synthesizing Network Interface Controllers -- Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units -- An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs -- Register-Based Permutation Networks for Stride Permutations -- A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures -- Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability -- Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs -- SAMOS III – Compilers, System Modeling, and Simulation -- Comparison of Data Dependence Analysis Tests -- MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code -- High-Level Energy Estimation for ARM-Based SOCs -- IDF Models for Trace Transformations: A Case Study in Computational Refinement -- Systems, Architectures, Modeling, and Simulation 2004 (SAMOS IV) -- Programming Extremely Flexible Platforms -- SAMOS IV – Reconfigurable Computing -- The Virtex II ProTM MOLEN Processor -- Reconfigurable Hardware for a Scalable Wavelet Video Decoder and Its Performance Requirements -- Design Space Exploration for Configurable Architectures and the Role of Modeling, High-Level Program Analysis and Learning Techniques -- Modeling Loop Unrolling: Approaches and Open Issues -- Self-loop Pipelining and Reconfigurable Dataflow Arrays -- Architecture Exploration for 3G Telephony Applications Using a Hardware–Software Prototyping Platform -- Embedded Context Aware Hardware Component Generation for Dataflow System Exploration -- On the (Re-)Use of IP-Components in Re-configurable Platforms -- Customising Hardware Designs for Elliptic Curve Cryptography -- Dynamic Hardware Reconfigurations: Performance Impact for MPEG2 -- Compiler and System Techniques for soc Distributed Reconfigurable Accelerators -- SAMOS IV – Architectures and Implementation -- Design Space Exploration with Automatic Selection of SW and HW for Embedded Applications -- On Enhancing SIMD-Controlled DSPs for Performing Recursive Filtering -- Memory Bandwidth Requirements of Tile-Based Rendering -- Using CoDeL to Rapidly Prototype Network Processsor Extensions -- Synchronous Transfer Architecture (STA) -- Generated DSP Cores for Implementation of an OFDM Communication System -- A Novel Data-Path for Accelerating DSP Kernels -- Scalable FFT Processors and Pipelined Butterfly Units -- Scalable Instruction-Level Parallelism -- A Low-Power Multithreaded Processor for Baseband Communication Systems -- Initial Evaluation of Multimedia Extensions on VLIW Architectures -- HIBI v.2 Communication Network for System-on-Chip -- SAMOS IV – System Modeling, and Simulation -- DIF: An Interchange Format for Dataflow-Based Design Tools -- Scalable and Modular Scheduling -- Early ISS Integration into Network-on-Chip Designs -- Cycle Accurate Simulation Model Generation for SoC Prototyping -- Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting -- A Communication-Centric Design Flow for HIBI-Based SoCs -- Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri Nets -- Communication Optimization in Compaan Process Networks -- Analysis of Dataflow Programs with Interval-Limited Data-Rates -- High-Speed Event-Driven RTL Compiled Simulation -- A High-Level Programming Paradigm for SystemC -- Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications -- Constraints Derivation and Propagation for Large-Scale Embedded Systems Exploration.
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|a Computer science.
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|a Computer hardware.
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|a Microprocessors.
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|a Computer communication systems.
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|a Computer system failures.
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|a Architecture, Computer.
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|a Computers.
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|a Computer Science.
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|a Theory of Computation.
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|a Computer Hardware.
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|a Processor Architectures.
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|a Computer Communication Networks.
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|a System Performance and Evaluation.
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|a Computer System Implementation.
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700 |
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|a Pimentel, Andy D.
|e editor.
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|a Vassiliadis, Stamatis.
|e editor.
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710 |
2 |
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|a SpringerLink (Online service)
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|t Springer eBooks
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776 |
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|i Printed edition:
|z 9783540223771
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830 |
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
|v 3133
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856 |
4 |
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|u http://dx.doi.org/10.1007/b98714
|z Full Text via HEAL-Link
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912 |
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|a ZDB-2-SCS
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|a ZDB-2-LNC
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|a ZDB-2-BAE
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|a Computer Science (Springer-11645)
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