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03154nam a22006135i 4500 |
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978-3-540-31617-6 |
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DE-He213 |
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20151204161423.0 |
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100409s2005 gw | s |||| 0|eng d |
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|a 9783540316176
|9 978-3-540-31617-6
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|a 10.1007/11605300
|2 doi
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|d GrThAP
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|a QA76.9.A73
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|a QA76.9.S88
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|a UYD
|2 bicssc
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|a COM032000
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|a COM067000
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|a 003.3
|2 23
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|a Job Scheduling Strategies for Parallel Processing
|h [electronic resource] :
|b 11th International Workshop, JSSPP 2005, Cambridge, MA, USA, June 19, 2005, Revised Selected Papers /
|c edited by Dror Feitelson, Eitan Frachtenberg, Larry Rudolph, Uwe Schwiegelshohn.
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|a Berlin, Heidelberg :
|b Springer Berlin Heidelberg,
|c 2005.
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|a VIII, 283 p.
|b online resource.
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
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|a text file
|b PDF
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
|v 3834
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|a Modeling User Runtime Estimates -- Workload Analysis of a Cluster in a Grid Environment -- ScoPred–Scalable User-Directed Performance Prediction Using Complexity Modeling and Historical Data -- Open Job Management Architecture for the Blue Gene/L Supercomputer -- AnthillSched: A Scheduling Strategy for Irregular and Iterative I/O-Intensive Parallel Jobs -- An Extended Evaluation of Two-Phase Scheduling Methods for Animation Rendering -- Co-scheduling with User-Settable Reservations -- Scheduling Moldable BSP Tasks -- Evolving Toward the Perfect Schedule: Co-scheduling Job Assignments and Data Replication in Wide-Area Systems Using a Genetic Algorithm -- Wave Scheduler: Scheduling for Faster Turnaround Time in Peer-Based Desktop Grid Systems -- Enhancing Security of Real-Time Applications on Grids Through Dynamic Scheduling -- Unfairness Metrics for Space-Sharing Parallel Job Schedulers -- Pitfalls in Parallel Job Scheduling Evaluation.
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|a Computer science.
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|a Logic design.
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|a Microprocessors.
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|a Architecture, Computer.
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|a Computer programming.
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|a Operating systems (Computers).
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|a Algorithms.
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|a Computer Science.
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|a Computer System Implementation.
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|a Operating Systems.
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|a Programming Techniques.
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|a Algorithm Analysis and Problem Complexity.
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|a Processor Architectures.
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|a Logic Design.
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|a Feitelson, Dror.
|e editor.
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1 |
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|a Frachtenberg, Eitan.
|e editor.
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700 |
1 |
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|a Rudolph, Larry.
|e editor.
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700 |
1 |
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|a Schwiegelshohn, Uwe.
|e editor.
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710 |
2 |
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|a SpringerLink (Online service)
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773 |
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|t Springer eBooks
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776 |
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|i Printed edition:
|z 9783540310242
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830 |
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
|v 3834
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856 |
4 |
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|u http://dx.doi.org/10.1007/11605300
|z Full Text via HEAL-Link
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912 |
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|a ZDB-2-SCS
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912 |
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|a ZDB-2-LNC
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|a Computer Science (Springer-11645)
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