Concurrency and Hardware Design Advances in Petri Nets /
As CMOS semiconductor technology strides towards billions of transistors on a single die new problems arise on the way. They are concerned with the - minishing fabrication process features, which a?ect for example the gate-to-wire delay ratio. They manifest themselves in greater variations of size a...
| Corporate Author: | |
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| Other Authors: | , , |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Berlin, Heidelberg :
Springer Berlin Heidelberg : Imprint: Springer,
2002.
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| Edition: | 1st ed. 2002. |
| Series: | Lecture Notes in Computer Science,
2549 |
| Subjects: | |
| Online Access: | Full Text via HEAL-Link |
Internet
Full Text via HEAL-LinkΒΚΠ - Πατρα: ALFd
| Call Number: |
330.01 BAU |
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| Copy 1 | Available |
ΒΚΠ - Πατρα: BSC
| Call Number: |
330.01 BAU |
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| Copy 2 | Available |
| Copy 3 | Available |