Power-Aware Computer Systems Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002, Revised Papers /
| Corporate Author: | |
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| Other Authors: | , |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Berlin, Heidelberg :
Springer Berlin Heidelberg : Imprint: Springer,
2003.
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| Edition: | 1st ed. 2003. |
| Series: | Lecture Notes in Computer Science,
2325 |
| Subjects: | |
| Online Access: | Full Text via HEAL-Link |
Table of Contents:
- Power-Aware Architecture/Microarchitecture
- Early-Stage Definition of LPX: A Low Power Issue-Execute Processor
- Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints
- A Hardware Architecture for Dynamic Performance and Energy Adaptation
- Multi-Processor Computer System Having Low Power Consumption
- Power-Aware Real-Time Systems
- An Integrated Heuristic Approach to Power-Aware Real-Time Scheduling
- Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources
- A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics
- Power Modeling and Monitoring
- Energy-Driven Statistical Sampling: Detecting Software Hotspots
- Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets
- SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms
- Power-Aware OS and Compilers
- Application-Supported Device Management for Energy and Performance
- Energy-Efficient Server Clusters
- Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches.