Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings /

• Corporate Author: SpringerLink (Online service)
• Other Authors: Vounckx, Johan (Editor), Azemard, Nadine (Editor), Maurine, Philippe (Editor)
• Format: Electronic eBook
• Language: English
• Published: Berlin, Heidelberg : Springer Berlin Heidelberg, 2006.
• Series: Lecture Notes in Computer Science, 4148
• Subjects: Computer science.; Arithmetic and logic units, Computer.; Computer memory systems.; Logic design.; Microprocessors.; Computer system failures.; Computers.; Computer Science.; Theory of Computation.; Logic Design.; Processor Architectures.; System Performance and Evaluation.; Arithmetic and Logic Structures.; Memory Structures.

Welcome to the proceedings of PATMOS 2006, the 16th in a series of international workshops. PATMOS 2006 was organized by LIRMM with CAS technical - sponsorship and CEDA sponsorship. Over the years, the PATMOS workshop has evolved into an important European event, where researchers from both industry...

Table of Contents:

• Session 1 – High-Level Design
• Session 2 – Power Estimation / Modeling
• Session 3 – Memory and Register Files
• Session 4 – Low-Power Digital Circuits
• Session 5 – Busses and Interconnects
• Session 6 – Low Power Techniques
• Session 7 – Applications and SoC Design
• Session 8 – Modeling
• Session 9 – Digital Circuits
• Session 10 – Reconfigurable and Programmable Devices
• Poster 1
• Poster 2
• Poster 3
• Keynotes
• Industrial Session.