Power-Aware Computer Systems First International Workshop, PACS 2000 Cambridge, MA, USA, November 12, 2000 Revised Papers /
The phenomenal increases in computer system performance in recent years have been accompanied by a commensurate increase in power and energy dissipation. The latter has directly resulted in demand for expensive packaging and cooling technology, an increase in product cost, and a decrease in product...
Συγγραφή απο Οργανισμό/Αρχή: | |
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Άλλοι συγγραφείς: | , |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Berlin, Heidelberg :
Springer Berlin Heidelberg : Imprint: Springer,
2001.
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Έκδοση: | 1st ed. 2001. |
Σειρά: | Lecture Notes in Computer Science,
2008 |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- Power-Aware Microarchitectural/Circuit Techniques
- System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors
- Ramp Up/Down Functional Unit to Reduce Step Power
- An Adaptive Issue Queue for Reduced Power at High Performance
- Application/Compiler Optimizations
- Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform
- Exploiting Content Variation and Perception in Power-Aware 3D Graphics Rendering
- Compiler-Directed Dynamic Frequency and Voltage Scheduling
- Exploiting IPC/Memory Slack
- Cache-Line Decay: A Mechanism to Reduce Cache Leakage Power
- Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
- Power/Performance Models and Tools
- TEM2P2EST: A Thermal Enabled Multi-model Power/Performance ESTimator
- Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor
- A Comparison of Two Architectural Power Models.