Cryptographic Hardware and Embedded Systems -- CHES 2003 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings /

Λεπτομέρειες βιβλιογραφικής εγγραφής
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Άλλοι συγγραφείς: Walter, Colin D. (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt), Koc, Cetin K. (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt), Paar, Christof (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2003.
Έκδοση:1st ed. 2003.
Σειρά:Lecture Notes in Computer Science, 2779
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
Πίνακας περιεχομένων:
  • Invited Talk
  • The Security Challenges of Ubiquitous Computing
  • Side Channel Attack Methodology
  • Multi-channel Attacks
  • Hidden Markov Model Cryptanalysis
  • Power-Analysis Attacks on an FPGA - First Experimental Results
  • Hardware Factorization
  • Hardware to Solve Sparse Systems of Linear Equations over GF(2)
  • Symmetric Ciphers: Side Channel Attacks and Countermeasures
  • Cryptanalysis of DES Implemented on Computers with Cache
  • A Differential Fault Attack Technique against SPN Structures, with Application to the AES and Khazad
  • A New Algorithm for Switching from Arithmetic to Boolean Masking
  • DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits
  • Secure Hardware Logic
  • Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers
  • Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology
  • Security Evaluation of Asynchronous Circuits
  • Random Number Generators
  • Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts
  • True Random Number Generators Secure in a Changing Environment
  • How to Predict the Output of a Hardware Random Number Generator
  • Efficient Multiplication
  • On Low Complexity Bit Parallel Polynomial Basis Multipliers
  • Efficient Modular Reduction Algorithm in [x] and Its Application to "Left to Right" Modular Multiplication in [x]
  • Faster Double-Size Modular Multiplication from Euclidean Multipliers
  • More on Efficient Arithmetic
  • Efficient Exponentiation for a Class of Finite Fields GF(2 n ) Determined by Gauss Periods
  • GCD-Free Algorithms for Computing Modular Inverses
  • Attacks on Asymmetric Cryptosystems
  • Attacking Unbalanced RSA-CRT Using SPA
  • The Doubling Attack - Why Upwards Is Better than Downwards
  • An Analysis of Goubin's Refined Power Analysis Attack
  • A New Type of Timing Attack: Application to GPS
  • Implementation of Symmetric Ciphers
  • Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia
  • Very Compact FPGA Implementation of the AES Algorithm
  • Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs
  • Hyperelliptic Curve Cryptography
  • Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves
  • Countermeasures against Differential Power Analysis for Hyperelliptic Curve Cryptosystems
  • Countermeasures to Side Channel Leakage
  • A Practical Countermeasure against Address-Bit Differential Power Analysis
  • A More Flexible Countermeasure against Side Channel Attacks Using Window Method
  • Security of Standards
  • On the Security of PKCS #11
  • Attacking RSA-Based Sessions in SSL/TLS.