Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000 Proceedings /

Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000 Proceedings /

Λεπτομέρειες βιβλιογραφικής εγγραφής
Συγγραφή απο Οργανισμό/Αρχή:	SpringerLink (Online service)
Άλλοι συγγραφείς:	Soudris, Dimitrios (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt), Pirsch, Peter (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt), Barke, Erich (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt)
Μορφή:	Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:	English
Έκδοση:	Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2000.
Έκδοση:	1st ed. 2000.
Σειρά:	Lecture Notes in Computer Science, 1918
Θέματα:	Architecture, Computer. Microprocessors. Arithmetic and logic units, Computer. Logic design. Computer system failures. Computational complexity. Computer System Implementation. Processor Architectures. Arithmetic and Logic Structures. Logic Design. System Performance and Evaluation. Complexity.
Διαθέσιμο Online:	Full Text via HEAL-Link

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